In recent years, reduction of wiring width and narrowing of wiring pitch has advanced, as the density of wiring circuits in the electrical and electronic field has increased. However, the narrower the wiring pitch is, the greater the possibility of shorting or migration would be between adjacent wiring.
As technology for resolving this problem, Patent Document 1 discloses forming a swelling resin film on a surface of an insulating base material, forming grooves of a depth no less than the thickness of the film, from the outer surface of the swelling resin film, depositing catalytic metal on the surface of the grooves and the surface of the swelling resin film, and causing the swelling resin film to swell so as to detach from the surface of the insulating base material, and then forming an electroless plating film only on the portions where the catalytic metal remains.
According to this technology, it is possible to maintain an outline of the circuit pattern with high accuracy, and the occurrence of shorting and migration is suppressed. However, if a plurality of parts to be connected which are exposed on the surface of a structure are connected mutually by wiring, using the technology described in Patent Document 1, then the achievement of higher density of the wiring circuit is obstructed.
Furthermore, Non-Patent Document 1 describes using sealing resin to seal a semiconductor device which has been wire bonded by metal wires, or the like.
Patent Document 1: Japanese Patent Application Publication No. 2010-50435 (Paragraph 0014)
Non-Patent Document 1: Reference material accompanying lecture “Advanced QFN Package for Low Cost and High Performance Solution/Andy Tseng, Bernd Appelt, Yi-Shao Lai, Mark Lin, Bruce Hu, J W Chen, Sunny Lee” given May 12th 2010 at “ICEP 2010” held in Sapporo May 12th to 14th 2010.